Not applicable.
Not applicable.
1. Field of the Invention
The present invention generally relates to a computer system that includes a central processing unit that can operate at different frequencies. More particularly, the present invention relates to a portable computer system in which the speed of the central processing unit is accelerated in response to system command entries from a user.
2. Background of the Invention
Power management is an integral part of a battery-operated portable notebook computer. To maximize battery life, computer systems manage the power drain on the batteries by placing the computer system in a low power mode whenever possible. Typically, a computer system is placed in a low power mode when the computer system is inactive. The computer system is subsequently awoken in response to system activity, such as occurs when the user depresses any key on the keyboard or moves or presses a button on a mouse. See U.S. Pat. No. 5,218,704. Thus, any keystroke forms a break event that wakes the system from an idle mode.
Computer systems typically include input devices, such as a keyboard and a pointing device. The keyboard usually includes 101 alphanumeric, positioning, and function keys. A mouse or other pointing device includes some form of motion sensor, and 2 or 3 finger operated control buttons. The keyboard and pointing device connect electrically to a keyboard controller via a PS/2 bus, which is a four wire, synchronous bus. The keyboard controller typically comprises a microprocessor-based controller, such as the Intel 8042 or Intel 8051. When a key is pressed, logic inside the keyboard issues a xe2x80x9cmake codexe2x80x9d signal to the keyboard controller. A xe2x80x9cbreak codexe2x80x9d is issued when the key is lifted. Multiple keys may be pressed, especially in combination with a xe2x80x9cshiftxe2x80x9d, xe2x80x9cCtrlxe2x80x9d, xe2x80x9cAltxe2x80x9d, or xe2x80x9cfunctionxe2x80x9d key. The keyboard controller identifies the xe2x80x9cmakexe2x80x9d code and translates it to a xe2x80x9cscan codexe2x80x9d that is used by the operating system and application software. A mouse periodically issues a three byte packet of information. The first byte identifies if a button is pressed, and if so, which byte is pressed. The second and third bytes identify the displacement of the mouse along the X and Y axis that has occurred since the last mouse packet was sent, usually in two""s complement format.
After a key press on the keyboard or mouse, or after a mouse movement, the keyboard controller generates a standard interrupt signal to the core chipset. Typically an IRQ1 is transmitted in response to a keyboard event, and IRQ12 is transmitted in response to a mouse event. The system BIOS responds to the keyboard interrupt (IRQ1), and assembles the scan codes for the operating system software to use. The mouse interrupts (IRQ12) are transmitted directly to the operating system software driver. In the Microsoft Windows Operating System, an input device driver examines the scan code and mouse data. The operating system will either message data as virtual scan codes to the application software, or will use the input data for its direct system commands.
The core chipset may include some limited power management functionality that permits the system to be placed in a low power state when the system is inactive. The system typically monitors inputs from the keyboard or mouse to determine when the system should break from the low power mode. The problem, however, is that placing the computer in a low power mode inevitably compromises system performance. A system in a low power state is not immediately responsive to user demands, and thus a user experiences some period of latency as the computer resumes its normal operational state. As the latency period becomes longer, it becomes increasingly irritating to the user.
Developing a power management system that is instantly and accurately responsive to user demands is problematic. There are two general techniques that have been used and discussed over the years for managing power in a portable computer. The first technique involves the manipulation of the operating frequency of the CPU and/or chipset. In particular, the system clock speeds are lowered to save power during periods when the system is perceived to be idle. See U.S. Pat. Nos. 5,625,826 and 5,504,908.
The manipulation of clock frequency for power management fell out of favor with the advent of techniques that completely halted the CPU by stopping the CPU clock. One technique that gained acceptance was to have the South bridge device generate a Stopclock signal to the CPU that caused the system to turn off the CPU clock, thereby placing the CPU in a suspended state. The Stopclock signal was generated in response to some event, or some indication that the system was inactive. A variation of the Stopclock technique permitted the system to resume normal operation for a fixed period to respond to a particular system event, followed by returning to the idle mode. This was commonly referred to as a Burst event. Another technique that was developed was halting the CPU in response to a software Autohalt command. The Autohalt technique required support of the application or operating system, which was supposed to report when it had finished a routine, and then instruct the CPU to go into a low power state. While both Stopclock and Autohalt have relatively minimal latency periods, they are not the most efficient techniques to control the CPU frequency, because the CPU must either be started or stopped, and cannot be throttled to slower or faster speeds. The ability to throttle the CPU to slower speeds also has the advantage of being able to lower the voltage to the CPU, while the CPU remains operational, albeit at a lower speed. Also, the Stopclock technique generally does not impact the amount of power drawn by the chipset.
Because of these limitations, power management in current portable computers has returned to the use of frequency manipulation to conserve battery power. Most CPU manufacturers now offer a frequency manipulation technique as part of current processors. For example, Intel has a technology that it markets as xe2x80x9cSpeedstep(copyright)xe2x80x9d that enables the processor to operate at different clock speeds. Similarly, AMD has the xe2x80x9cPowerNow!(copyright)xe2x80x9d technology that also implements frequency manipulation of the CPU clock speed. Likewise, Transmeta(copyright) has the xe2x80x9cLongRun(copyright)xe2x80x9d technology that also performs frequency manipulation. Each of these techniques relies on lowering the CPU core frequency and/or chipset in response to either a system power state, a manual setting by the user, or the actual usage of the system.
As an example, the PowerNow! Technique from AMD senses the system idle time by looking at the excess capacity of the CPU. Thus, for example, if the CPU is idle greater than 20% of the time, the system can automatically lower the system clocks to 80% of their maximum clock frequency (i.e., from 600 MHz to 500 MHz. This enables the system to continue operating, but draw less power. In addition, frequency control circuitry for most manufacturers also typically includes a voltage control circuit that selects a lower CPU operating voltage level when the slower speed operating frequency is used.
Although these frequency manipulation techniques have improved the efficiency of the CPU in portable computer systems, the decision regarding when to change frequency still is archaic. Almost all systems are reactive, and thus wait to change speed until after the speed change is required. Very few (if any) systems exist that attempt to predict the performance requirement of the CPU, so as to modify the CPU clock speed at the very time that the change in speed is needed. Instead, the most advanced technique looks at an average of system idle times to determine what the current speed setting should be for the CPU. Such as system cannot efficiently match peak demands of a computer system.
One implementation suggested by the assignee of the present invention in U.S. Pat. No. 5,625,826 is to monitor the CPU memory activity to predict the frequency at which the system should operate. An absence of CPU reads from system memory was interpreted as indicating that the computer system was in a wait state, and could be slowed down. While this technique has merit in certain conditions, it is not entirely accurate in predicting the work level of the CPU. The problem with power management systems that monitor CPU inactivity is that there is an inherent latency both in detecting the requirement for higher CPU performance, and reacting to this requirement. Because almost all power management systems operate by lowering the speed of the computer system, the instantaneous performance is inherently slowed. The performance of instantaneous tasks, such as loading a file, performing a search, or refreshing a screen, are the commands that the user notices most acutely.
It would be advantageous if a power management technique could be developed that could predict the need for increased performance from the CPU. It would also be advantageous if a power management system was capable of examining requested transactions to aid in predicting CPU usage earlier in time to minimize latency. Most, if not all, current computer systems treat all user inputs equally. The only power management response that typically occurs in response to a user input is that the system will wake-up the CPU if the clocks are stopped to the CPU, to permit the CPU to process the requests. Thus, most power management systems use a user input as a break event, and do not attempt to identify the type of input for power management purposes.
The present invention solves the deficiencies of the prior art by implementing a power management system for controlling the speed of the CPU and/or chipset based on user inputs. According to the preferred embodiment, the system monitors user inputs, and distinguishes between the types of user input. In particular, any user input that indicates a system command is identified, and in response, the CPU is accelerated to a higher clock frequency. In particular, a mouse click, pressing the xe2x80x9caltxe2x80x9d key in combination with another key, or pressing the xe2x80x9cEnterxe2x80x9d key or the xe2x80x9cPage Upxe2x80x9d or xe2x80x9cPage Downxe2x80x9d key, selection of a special function key, and other predetermined keystrokes and keystroke combinations are used to denote a system command that will require increased processor capacity. Thus, the system detects these type of user inputs, and in response, accelerates the CPU frequency. Conversely, the system preferably responds to a simple data input from the user by maintaining the low power operation.
The system command inputs may be distinguished in several ways. One possibility is to have the operating system driver distinguish system commands from data entry operations. Upon detecting a system command, the operating system driver directs the power management software to accelerate to the highest CPU speed. Another possibility is that the keyboard controller may be configured to discriminate system command keystrokes, or a combination of keystrokes, from data keystrokes by comparing user inputs to a list of system commands. Upon detecting a system command, the keyboard controller generates an interrupt to the CPU. Yet another possibility for identifying system commands is to have the system BIOS read scan codes from the keyboard, and identify system commands.
According to one exemplary embodiment, the keyboard controller or other logic monitors user inputs and distinguishes between data inputs and system command inputs. In response to a system command input, the controller generates an interrupt to the core chipset, and also generates a System Management interrupt (SMI). The SMI activates a power management speed control algorithm, which provides a control input to a frequency multiplexer that selects a higher clock frequency for the CPU. Consequently, in response to the system command input from the user, the CPU clock speed is accelerated almost instantly. After a predetermined time period, the power management algorithm may return the clock frequency to a lower speed.
According to another exemplary embodiment, a software driver reads the input device and translates user input signals into an equivalent scan code. The translated scan code is then messaged to the application currently in focus. The Operating system input device driver software compares the keyboard or mouse data against a list of keystrokes that indicate the necessity of keyboard acceleration. If a match occurs, the Operating system will direct the power management driver to increase the speed of the CPU.
In another exemplary embodiment, the system BIOS may examine user input scan codes when they are read in response to an interrupt request, or when the scan codes are retrieved in response to an interrupt request. The scan codes may be compared to a list of keystrokes that have been identified as system commands. If a match occurs, the power management software driver is directed to increase CPU speed.
These and other aspects of the present invention will become apparent upon analyzing the drawings, detailed description and claims, which follow.